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Technical Information
TMR Device with World Best Performance Fabricated by Mass Manufacturing System

Gbit MRAM is in sight with the realization of 230% magnetoresistance ratio by the use of sputtering method
September 7, 2004

National Institute of Advanced Industrial Science and Technology (AIST)
ANELVA Corporation

Key Points

Developed a mass manufacturing technology for a new TMR device with magnesium oxide (MgO) as tunnel barrier layer

   

Fabricated a new TMR device on 8 inch diameter Si wafer (world's first) which is indispensable for mass production of MRAM

   
Achieved 230% magnetoresistance ratio; the highest magnetoresistance ratio reported to date in the world. This is three times higher compared to that of conventional TMR devices
   
This technology paves the way in realizing Gbit MRAM and ultra high-density hard disk drives

Synopsis

ANELVA Corporation (President:?@Aritaka Imamura, 5-8-1 Yotsuya, Fuchu-shi, Tokyo) and National Institute of Advanced Industrial Science and Technology (AIST) (President Hiroyuki Yoshikawa) Nanoelectronics Research Institute (Director: Toshimi Wada) have successfully developed a mass manufacturing technology suitable for preparing high performance Tunneling Magneto Resistance (TMR) device, which is the core device for high speed non-volatile Magnetoresistive Random Access Memory (MRAM).
The current result demonstrates that high performance novel TMR device can be prepared by an existing sputtering system suitable for mass manufacturing of MRAM.


Future plan

Below are the issues to be developed within the framework of collaboration research.
Improve the performance of the presently developed novel TMR device
   
Apply the currently developed process to actual MRAM production
   
Clarify the electron transport mechanism of the novel TMR device fabricated by sputtering technique
   
Develop a technology to reduce the resistance of the TMR device for magnetic-head application
*Reference:
http://www.aist.go.jp/aist_e/latest_research/2004/20040907/20040907.html
Contacts

ANELVA Corporation
Electron Device Equipment Engineering Div., Process Technology Group
5-8-1, Yotsuya, Fuchu-shi, Tokyo, Japan 183-8508

Group Manager Naoki Watanabe E-mail:watanaben@mhc.anelva.jp
Manager David Djayaprawira E-mail:djayaprawira@mhc.anelva.jp
History of improvement of magnetoresistance ratio in TMR device

Schematic view of the sputtering method and general view of the sputtering system



Fig.1-FMagnetoresistance curve of the novel TMR device at room temperature